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Analog Design/Custom IC

Product Description

IC layout, DRC/LVS verification, and RC parasitic extraction environment for analog, mixed-signal and RF design engineers

Gateway

Gateway

Schematic Editor and Schematic Viewer. Supports flat or hierarchical designs of any technology. Gateway readily accepts legacy designs from other schematic editors through EDIF 2 0 0 standard.

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Guardian

Guardian

DRC/LVS/NET Physical Verification. Provides interactive and batch mode verification of analog, mixed signal and RF IC designs.

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Expert

EXPERT

Layout Editor. Hierarchical IC layout editor with full editing features, large capacity and fast layout viewing.

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Hipex

HIPEX

 

 

Full-Chip Parasitic Extraction.Performs extraction of parasitic capacitances and resistances from hierarchical layouts.